UNIT 1 - Basic Structures of Computers (CSVTU, BHILAI: COMPUTER SYSTEM ARCHITECTURE NOTES) :

Branch: CSE/AI/AI&DS/AI&ML

Syllabus : Refer CSVTU website

click here 

👉https://csvtu.ac.in/ew/programs-and-schemes/

UNIT 1 - Basic Structures of Computers:

Syllabus: 

Notes:   (Go through these points before answering the Questions)

👦Prerequisite – 

Systems architecture refers to the structure of the internal components of a computer system. Modern computers often have a von Neumann architecture, which involves: a processor; a memory unit, which stores both instructions and data; connections for input and output devices; and secondary storage for data.

Block Diagram of the computer.

In the 1940s, John von Neumann and his team developed the concept of the stored program computer.

John von Neumann coined and developed this architecture. The computer we are using nowadays is based on the von Neumann architecture. It is also known as Princeton architecture.

Harvard Architecture consists of code and data laid in distinct memory sections. It requires a separate memory block for data and instruction.

In a system or computer, most of the tasks are controlled with the help of a processor or CPU (Central processing unit), which is the main component of a computer. 

The CPU usually has two main systems: control unit (CU) and arithmetic and logic unit (ALU). 

The control unit (CU) is used to synchronize the tasks with the help of sending timings and control signals. On the other hand, mathematical and logical operations can be handled with the help of ALU. 

Micro programmed control units and hardwired control units can be called two types of control units. 

We can execute an instruction with the help of these two control units.

In the hardwired control unit, the execution of operations is much faster, but the implementation, modification, and decoding are difficult. In contrast, implementing, modifying, decoding micro-programmed control units is very easy. The micro-programmed control unit is also able to handle complex instructions. With the help of control signals generated by micro-programmed and hardwired control units, we are able to fetch and execute the instructions.

Figure – Basic CPU structure👇

Instruction Formats (Zero, One, Two and Three Address Instruction)

A instruction is of various length depending upon the number of addresses it contain. Generally CPU organization are of three types on the basis of number of address fields:

1. Single Accumulator organization
2. General register organization
3. Stack organization

1. Zero Address Instructions –
   Address is stored in the opcode, in the zero address instruction. A stack based organization uses zero address instruction.
2. One Address Instructions –
   This use a implied ACCUMULATOR register for data manipulation. One operand is in accumulator and other is in register or memory location. Implied means that the CPU already know that one operand is in accumulator so there is no need to specify it. i.e there will be one opcode field and one address field.
3. Two Address Instructions –
   Here two address can be specified in the instruction. Unlike earlier in one address instruction, the result was stored in accumulator here result can be stored at a different location rather than just accumulator, but require the number more of the bit to represent address.
4. Three Address Instructions –
   This has three address field to specify a register or a memory location. The program created is much short in size but the number of bits per instruction increase.

Addressing Modes

The term addressing modes refers to the way in which the operand of an instruction is specified. The addressing mode specifies a rule for interpreting or modifying the address field of the instruction before the operand is actually executed.

An assembly language program instruction consists of two parts

Refer Q#4 For more details.

👦Prerequisite – 

There are two approaches of the design of the control unit of a microprocessor i.e.-

• Hardware approach. &
• Software approach.

Study 👉 Hardwired and Micro Programmed Control Unit.

To execute an instruction, there are two types of control units Hardwired Control unit and Micro-programmed control unit.

Question and Answers : (As per previous year CSVTU QP)

1. Explain the working of Hardwired Control Unit with neat Block Diagram.

Ans: See detailed Notes: 

👧All 3 methods including Sequence Counter method

      click👉 3 methods of hard wired Control Units

 👴For Sequence Counter method: 

      click👉sequence counter method hard wired CU

or 

Designing methods of hardwired control unit

Here the control signals are generated using hardware.   

There are three types of Hardwired Control Units.

1. State table method :

• Here the behavior of control unit is represented in the form of a table, which is known as the state table.
• Here, each row represents the T-states and the columns represent the instructions.
• Every intersection of the specific column to each row indicates which control signal will be produced in the corresponding T- state of an instruction.
• Here the hardware circuitry is designed for each column(i.e. for a specific instruction) for producing control signals in different T-states.

2. Delay element method :

• Here the control unit behavior is represented in the form of a flowchart.
• Each step in the flowchart represents a control signal that needs to be produced for processing the instructions.
• If all the steps of the instructions are performed, this means the instruction is executed completely.
• Control signals perform micro-operations and each micro-operation requires one T-state.
• For the micro-operations which are independent, they are required to be performed in different T-state. Therefore, for every consecutive control signal an exactly 1-state delay is required, which can be produced with the help of D FF.
• Therefore. D Flip-Flops are inserted between every two consecutive control signals.

3. Sequence counter method :

This is the most popular and most commonly used method for generating delays between every consecutive control signal. 

It is similar to the delay element method, but the only difference is that instead of unnecessary D Flip flops there are triggering points in the circuit. They are activated after a gap of one-one  T-state.

Working of Sequence counter circuit –

• Here one SR FF , one decode and one counter is used.
• When the instruction cycle starts, then start = 1.
• As we know, when Start =  1, because S is connected to Start, therefore Q  becomes 1 and and Q’ becomes 0.
• Here the level triggering clock is used. Therefore, when clock = 1 or high and Start=1, as both outputs are connected to AND gate, so if the resultant of both is 1 that will enable the counter and counter starts counting from 0 0 0 state. So the 0 0 0 state is decoded by a decoder and produces output O1 , which will trigger the triggering point in the control circuit.
• Suppose the counter is 3 bits, it generates 23 = 8 states(000 001 ….. 111) . The first count 0 0 0 is given to 3:8 decoder. It will active output number 1. This output is not a control signal but this will trigger the triggering point in the control unit circuit.
• As the clock becomes high again after a gap of one T state, therefore clock =1 and start = 1 ,then the counter is enabled and changes it state to 001 and the counter decodes the count and makes O2 output high . And this will trigger a second triggering point in the circuit.
• All counting states are decoded in the same manner.

2. Explain the working of Micro Programmed Control Unit with neat Block Diagram.

Ans:

See detailed Notes: 

Wilke's Design: click👉  Wilke's design

Some Drawbacks are there in Wilke's design, modified Diagram is shown below👇

Modern Approach : Modification of Wilke's Design : Modern Approach Microprogrammed Control Unit

or

The microprogrammed control unit uses the software approach to generate the control signals. The generation of the control signals is determined with the help of the program. This program is stored in the special memory of the processor which is smaller and faster. This memory is termed as microprogram memory or control store and the program is termed as the microprogram.

Microprogrammed Control Unit :
Microprogrammed Control Unit produces control signals by using micro-instructions.

Micro program :

• A program is a set of instructions. An instruction requires a set of micro-operations.
• Micro-operations are performed using control signals.
• Here, these control signals are generated using micro-instructions.
• This means every instruction requires a set of micro-instructions
• A set of micro-instructions are called micro-program.
• Microprograms for all instructions are stored in a small memory called control memory. 
  The control memory is present inside the processor.

Working : 
Consider an instruction that is fetched from the main memory into the instruction Register (IR). 

The processor uses its unique opcode to identify the address of the first micro-instruction. 

That address is loaded into CMAR (Control Memory Address Register). 

This address is decoded to decide the corresponding memory instruction from the control Memory. 

Micro-instructions will only have a control field. The control field Indicates the control signals to be generated. Most micro-instructions will not have an address field. 

Usually µPC will simply get incremented after every micro-instruction. 

This is as long as the micro-program is executing sequentially. 

If there is a branch micro-instruction only then there will be an address filed. 

If the branch is unconditional, the branch address will be directly loaded into CMAR.

For conditional branches, the branch condition will check the appropriate flag. This is done using a MUX which has all flag inputs. If the condition is true, then the mux will inform CMAR to load the branch address. If the condition is false CMAR will simply get incremented.
The control memory is usually implemented using flash ROM as it is non-volatile.

3. Write the Differences between Hardwired and Micro Programmed Control Unit.

Ans: 👦Prerequisite – See Q#1 for details

Difference Chart

Basis of Differentiation	Hardwired Control Unit	Microprogrammed Control Unit
Basic	It is a circuitry approach.	This control unit is implemented by programming
Design	RISC style instructions	CISC style instructions
Modification	Modification is difficult as the control unit is hardwired. Modifying it will require the change in hardware.	Modifications are easy in case of microprogrammed control unit as it will require the in change in the code only.
Instructions	It works well for simple instructions.	It works well for complex instructions also.
Costing	Implementing hardwired structure requires a cost.	Implementing microprograms is not costly.
Control memory	No control memory is required	Control memory is required
Execution Speed	Faster execution	Comparatively slow

4. What are Addressing Modes? Explain various Addressing modes with an Example.

Ans: 

The instruction set of a microprocessor is a list of all the software instructions that the processor can execute.When an instruction expressed in machine code, it is encoding using 0’s and 1’s(in hexadecimal format)

Types of addressing mode in Intel Microprocessor 8086

1. Immediate addressing mode: MOV AX,10ABH
2. Direct addressing mode: MOV AX, [5000H]
3. Register addressing mode: MOV AX,BX
4. Register Indirect addressing mode: MOV AX,[BX]
5. Indexed addressing mode: MOV AX,[SI]
6. Register relative addressing mode: MOV AX, 50H[BX]
7. Base plus index addressing mode: MOV AX, [BX] [SI]
8. Base relative plus index addressing mode: MOV AX,50H[BX][SI]

Detailed Explanation: 

Note: An instruction may have 0-3 number of operands

Types of addressing modes:

1. Register mode – In this type of addressing mode both the operands are registers.
   Example:

   MOV AX, BX
   XOR AX, DX
   ADD AL, BL

2. Immediate mode – In this type of addressing mode the source operand is a 8 bit or 16 bit data. Destination operand can never be immediate data.
   Example:

   MOV CL, 0A
   ADD AL, 45

3. Displacement or direct mode – In this type of addressing mode the effective address is directly given in the instruction as displacement, Example: MOV AX, [DISP]; MOV AX, [0500]

4. Register indirect mode – In this addressing mode the effective address is in SI, DI or BX. Example: Physical Address = Segment Address + Effective Address, MOV AX, [DI]; ADD AL, [BX]; MOV AX, [SI] 

5. Based indexed mode – In this the effective address is sum of base register and index register. Base register: BX, BP; Index register: SI, DI

6. Indexed mode – In this type of addressing mode the effective address is sum of index register and displacement.
   Example:

   MOV AX, [SI+2000]
   MOV AL, [DI+3000]

7. Based mode – In this the effective address is the sum of base register and displacement.
   Example:

   MOV AL, [BP+ 0100]

8. Based indexed displacement mode – In this type of addressing mode the effective address is the sum of index register, base register and displacement.
   Example:

   MOV AL, [SI+BP+2000]

5. An instruction is stored at location 300 with its address field at location 301. The address field has the value 400, a processor register R1 contain the number 200. Evaluate Effective address if the addressing mode of the instruction are

(i) Direct

(ii) Immediate

(iii) Register Indirect

(iv) Relative

(v) Indexed

Answer:

the effective address if the addressing mode of the instruction is (i) 400 (ii) 301 (iii) 200 (iv)701 (v) 600

Explanation:

Given: An instruction is stored at location 300 with its address field at location 301. The address field at location 301. The address field has the value 400. A processor register r1 contains the number 200.

To find:  Evaluate the effective address if the addressing mode of the instruction is (i) direct (ii) immediate (iii) register indirect  (iv)relative (v) index with r1 as the index register

Solution: Note: An effective address is any operand to an instruction which references memory

The description given in the assignment can be represented like this:

Location _ Contents

300 _ opcode ; the instruction operation code

301 _ 400 ; address field of the above instruction

(a) Direct Addressing

(Example: Direct addressing mode: MOV AX, [5000H] means the content at memory location 5000 will be copied to AX), so as per our question,

Direct addressing means that the address field contains the address of memory location the instruction is supposed to work with (where an operand "resides").

Effective address would therefore be 400.

(b) immediate addressing:

(Example: Immediate addressing mode: MOV AX,10AB)H

Immediate addressing means that the address field contains the operand itself.

Effective address would therefore be 301.

(c) register indirect addressing: 

(Ex: Register Indirect addressing mode: MOV AX,[BX])

Register indirect addressing means that the address of an operand is in the register. The address field in this case contains just another operand.

Effective address would therefore be in R1 = 200.

(d) relative addressing

(Ex: Register relative addressing mode: MOV AX, 50H[BX])

Relative addressing means that the address field contains offset to be added to the program counter to address a memory location of the operand.

Effective address would therefore be 301 + 400 = 701.

(e) indexed addressing with R1 as index register

There are several possible indexed addressing modes but in this case (there is an address field) it is co called "indexed absolute" addressing.

In indexed absolute addressing the effective address is calculated by taking the contents of the address field and adding the contents of the index register.

Effective address would therefore be 400 + R1 = 400 + 200 = 600.

6. What are the various Buses types in Computer system.

Ans: 

Inside computers, there are many internal components. In order for these components to communicate with each other, they make use of wires that are known as a ‘bus’.

There are three types of bus lines: Data bus, Address bus, and Control bus.

The address bus, which is a unidirectional pathway that allows information to travel in only one direction, carries information about where data will be stored in memory.

The data bus is a bidirectional pathway that carries the actual data (information) to and from the main memory.

The control bus carries the control and timing signals needed to coordinate the activities of the entire computer. Think of this as a traffic cop.

Pic Source: The Computer Buses Wikimedia Commons

Bus Type	Description
Address bus	A unidirectional pathway – information can only flow one way
Data bus	A bi-directional pathway – information can flow in two directions
Control bus	Carries the control and timing signals needed to coordinate the activities of the entire computer

7. Explain Microoperations

or

Explain Instruction Execution

or

Explain significance of MAR, MBR , IR, GPR in execution of microoperations for fetching an Instruction.

Ans: See detailed Notes:  click👉 Microoperation 

OR 👲See the notes below: 

Microprogram: Program stored in memory that generates all control signals required to execute the instruction set correctly, it consists micro-instructions.
Micro-instruction: Contains a sequencing word and a control word. The control word is all control information required for one clock cycle.
Micro-operations: Micro-operations are the atomic operations which executes a particular micro-instruction.
Example of micro-operation during the fetch cycle:

t1: MAR ←(PC)
t2: MBR ←Memory
    PC ←(PC) + 1
t3: IR ←(MBR)

• Things a CPU must do:
  • Fetch Instructions
  • Interpret Instructions
  • Fetch Data
  • Process Data
  • Write Data

• Components of the CPU
  • Arithmetic and Logic Unit (ALU): does the actual computation or processing of data
  • Control Unit (CU): controls the movement of data and instructions into and out of the CPU and controls the operation of the ALU.

• A small amount of internal memory, called the registers, is needed by the CPU to fulfill these requirements

Register Organization

• Registers are at top of the memory They serve two functions:

1. User-Visible Registers - enable the machine- or assembly-language programmer to minimize main-memory references by optimizing use of registers
2. Control and Status Registers - used by the control unit to control the operation

User-Visible Registers

Categories of Use

• General Purpose registers - for variety of functions
• Data registers - hold data
• Address registers - hold address information
• Segment pointers - hold base address of the segment in use
• Index registers - used for indexed addressing and may be auto indexed
• Stack Pointer - a dedicated register that points to top of a Push, pop, and other stack instructions need not contain an explicit stack operand.

Control and Status Registers

• Essential to instruction execution
  • Program Counter (PC)
  • Instruction Register (IR)
  • Memory Address Register (MAR) - usually connected directly to address lines of bus
  • Memory Buffer Register (MBR) - usually connected directly to data lines of bus
• Program Status Word (PSW) - also essential, common fields or flags contained include:
  • Sign - sign bit of last arithmetic operation
  • Zero - set when result of last arithmetic operation is 0
  • Carry - set if last op resulted in a carry into or borrow out of a high-order bit
  • Equal - set if a logical compare result is equality
  • Overflow - set when last arithmetic operation caused overflow
  • Interrupt Enable/Disable - used to enable or disable interrupts

The Instruction Cycle

Instruction Cycle

Registers Involved In Each Instruction Cycle:

• Memory address registers(MAR) : It is connected to the address lines of the system bus. It specifies the address in memory for a read or write operation.
• Memory Buffer Register(MBR) : It is connected to the data lines of the system bus. It contains the value to be stored in memory or the last value read from the memory.
• Program Counter(PC) : Holds the address of the next instruction to be fetched.
• Instruction Register(IR) : Holds the last instruction fetched.

Basic instruction cycle contains the following sub-cycles.

• Fetch - read next instruction from memory into CPU
• Execute - Interpret the opcode and perform the indicated operation
• Interrupt - if interrupts are enabled and one has occurred, save the current process state and service the interrupt

Data Flow

• Exact sequence depends on CPU design
• We can indicate sequence in general terms, assuming CPU employs:
  • a memory address register (MAR)
  • a memory buffer register (MBR)
  • a program counter (PC)
  • an instruction register (IR)

Fetch cycle data flow

• PC contains address of next instruction to be fetched
• This address is moved to MAR and placed on address bus
• Control unit requests a memory read
• Result is
  • placed on data bus
  • result copied to MBR
  • then moved to IR

Meanwhile, PC is incremented.

************************************************************************************

for any further queries and doubts in this subject

please feel to write to me or contact me at:

Pradeep Kumar Chaudhary

pradeep14335@gmail.com

---------------------------------------------------------------------------------------------------------------------

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Unit-5 - VHDL: (VHSIC Very High Speed Integrated Circuit Hardware Description Language) Basics Handouts

QUICK REFERENCE HANDOUT FOR EXAMS

Very High Speed Integrated Circuit (VHSIC) Hardware Description Language (VHDL) 

VHDL Basics Handouts: 

UNIVERSITY: Chhattisgarh Swami Vivekananda Technical University, Bhilai (C.G.) 

SUBJECT: Digital Electronics

SEM: THIRD

CODE: B022314(022)

Syllabus Link: 

click here 👉https://csvtu.ac.in/ew/download/b-tech-3rd-semester-3/?wpdmdl=12485&refresh=6401acff29d151677831423

COURSE OUTCOME:

To Design and Develop Basic Digital Systems using VHDL.

Prerequisite: 

1.  See Mealy & Moore Machine in FSM.

2. LEARN VHDL SYNTAX AND OPERATORS 

2. Study the Body of VHDL program. 

3. LEARN DIFFERENT STYLES OF MODELLING: DATAFLOW, BEHAVIOURAL,STRUCTURAL STYLES. 

IMPORTANT KEY POINTS: 

What is VHDL?

VHSIC Hardware Description Language

Very High Speed Integrated Circuit 

•          IEEE standard

–        IEEE 1076-1987

–        IEEE 1076-1993

History of VHDL

•         Designed by IBM, Texas Instruments, and Intermetrics as part of the DoD funded VHSIC program

•          Standardized by the IEEE in 1987: IEEE 1076-1987

•          Enhanced version of the language defined in 1993: IEEE 1076-1993

•          Additional standardized packages provide definitions of data types and expressions of timing data

–        IEEE 1164 (data types)

–        IEEE 1076.3 (numeric)

–        IEEE 1076.4 (timing)

•          Hardware description languages describe a system

–        Systems can be described from many different points of view

•          Behavior: what does it do?

•          Structure: what is it composed of?

•          Functional properties: how do I interface to it?

•          Physical properties: how fast is it?

VHDL Syntax:

Questions: Compiled from CSVTU previous year Question Papers

1.  Discuss the various operators used in VHDL.

ANS:

2. Write short notes on Mealy and Moore machine.

or

Explain Mealy machine with example.

ANS:

While diving into the basic difference between the two, let's first understand finite state machines since Mealy and Moore both are the techniques used in finite state machines. The input combinational circuit in synchronous sequential circuits is made up of a series of logic gates, with flip flops serving as memory elements.

The synchronous sequence machine is described by the finite state machine (FSM), which is an abstract model. In a sequential circuit, the output is determined by the current input as well as previous history, necessitating an endless storage capacity.

Finite state machines are utilized because machines with infinite storage capacity are impossible to implement. Finite state machines are sequential circuits with a finite number of ways in which their past history might affect their future behavior.

Machines with a finite number of states are known as finite state machines. There are a limited number of memory devices in any finite-state system. We can construct a periodic sequence of fewer than or equal to n-states using an n-state machine.

There are two types of finite state machines (FSM). The way the output is generated is the main difference between them.

1. Moore Machine
2. Mealy Machine

The fundamental difference between the Mealy and Moore machines is that the dependency of output is on the current state and input. The current output of the Moore machine is solely determined by its current state. The current output of the Mealy machine is determined by the present state and present external inputs. Moore and Mealy machines are quite complex machines.

Moore and mealy machines are generators. Moore and Mealy machines have no knowledge of a final state because they aren't used to recognize languages. Moore and Mealy machines are finite-state deterministic devices.

3. Write a program in VHDL using Data flow modelling for half adder.

Logical Expressions:

Sum <= A XOR B 

 Carry Out <= A AND B

VHDL PROGRAM/CODE: 

The VHDL code for Half Adder is given below where the 

😎Data Flow Modelling is used as it involves only simpler equations.

library IEEE;
use IEEE.std_logic_1164.all;

entity half_adder is
port(A,B: in std_logic;          
sum,carryout: out std_logic
); 
end half_adder;

architecture flow of half_adder is
begin
sum<= A xor B;
carryout<=A and B;
end flow;

The libraries are declared, 

the entity is defined with the label “half_adder” and A, B, sum, carry_out as input and output ports, respectively. 

The architecture is defined with the two equations of 

sum <= A xor B 

and 

carryout  <=  A and B

So, this is a pretty simpler code where the equations of sum and carryout are defined.

4. Write a program in VHDL using Behavioral modelling for AND gate.

ANS:

Logic Development for AND Gate: The AND logic gate can be realized as follows –

The truth table for AND Gate is:

A	B	Y = A AND B
0	0	0
0	1	0
1	0	0
1	1	1

VHDL PROGRAM: 

😎NOTE: Behavioral modelling USES TRUTH TABLE

 

use IEEE.std_logic_1164.all;

entity AND_1_BEV is
    Port ( A : in STD_LOGIC;
           B : in STD_LOGIC;
           Y : out STD_LOGIC);
end AND_1_BEV;

architecture Behavioral of AND_1_BEV is
begin process (A, B)
begin
if(A='1' and B='1') then
Y <= '1';
else
Y <= '0';
end if;
end process;
end Behavioral;

5. Write difference between Moore and Mealy Machine. 

ANS:

Types of finite state machines

There are many fsm(finite state machines) in existence. The two most popular used in digital combinational and sequential circuits are 

• Melay Machine
• Moore Machine

Difference between melay vs moore machine

The main difference between melay and moore is the computation of the next state. In melay machine the output depends on the current state and the input variables. Where as in moore machine the output depends on the current state only. There are also other differences which are hardly highlighted any where.
​
Moore Machine 

1. More number of states in moore compared to melay for same fsm. 
2. States changes after 1 clock cycle. Latency = 1.
3. Synchronous output. Because the states are determined in a process.
4. States are output.

Mealy Machine 

1. Less number of states in mealy compared to moore for same fsm.
2. State transition on the same clock cycle. Latency = 0.
3. Asynchronous output.
4. Transition are output.

6. Explain lexical element and data object types in VHDL.

7. Write syntax for:

(i) entity and

(ii) architecture in VHDL.

ANS: SEE BLOCK DIAGRAMS ABOVE WITH ANY ONE EXAMPLE OF DIGITAL CIRCUIT.

Refer Book: 

VHDL (VHSIC-HDL, Very High-Speed Integrated Circuit Hardware Description Language) is a 

hardware description language used in electronic design automation to describe digital and 

mixed-signal systems such as field-programmable gate arrays and application-specific integrated 

circuits. To start with learning VHDL we are posting here the list of 5 VHDL books which are a 

good references to get started with VHDL coding.

1. VHDL: PROGRAMMING BY EXAMPLE - by Douglas L. Perry

 

2. Digital Design | With an Introduction to the Verilog HDL, VHDL, and System Verilog - by M. Morris Mano

 

  3. A Vhdl Primer - by Bhasker

 

  

4. Fundamentals of Digital Logic with VHDL Design - by Stephen Brown and Zvonko Vranesic

 

 

5. Circuit Design and Simulation With VHDL - by Pedroni V.A

Please feel free to send your suggestions if there is any good book in your list. 

We will be happy to share here.

Please provide valuable comments and suggestions for our motivation. 

ALL THE BEST FOR EXAMS

YOURS

PRADEEP KUMAR CHAUDHARY

🙏Feel free to write down any query if you have regarding this post.

Microprocessors 8085 Lab Experiments

Chhattisgarh Swami Vivekanand Technical University, Bhilai 

Branch: Electrical Engineering 

Semester: VI 

Subject: Microprocessors Lab 

Code: C024623(024)

Syllabus Source: Click here https://csvtu.ac.in/ew/download/b-tech-6th-semester-9/?wpdmdl=15795&refresh=63f73ed3b7ed31677147859

Develop and execute various programs on 8085 Microprocessor kit/ 8085 Simulator

Apparatus Required: 1. Microprocessor 8085 Kit or 8085 Simulator Software

List of experiments: (Minimum 10 experiments are to be performed) 

1. To Transfer data into specified register. 

2. To add content of two register and store result in another register. 

3. To add content of two memory locations and store result in another memory locations. 

4. To find 2’s complement of 8 bit number stored in a memory location. 

5. To mask upper nibble of the 8 bit number stored in a memory location. 

6. To transfer block of 10 data bytes from one memory location to another. 

7. To transfer block of 10 data bytes from one memory location to another in reverse order. 

8. To multiply two 8 bit numbers. 

9. To add contents of a block of 10 data bytes. 

10. To find largest among the 10 given data bytes. 

11. To find number of even and odd values from a given block of data bytes. 

12. Sorting given data bytes in ascending order. 

13. Two 16 bit numbers are residing at some memory location, Write a program two add them up and store the result at some other memory location. 

14. To count the how many number of times even and odd PARITY bytes are appearing in 256 consecutive memory locations. 

15. To convert a binary number in to its equivalent BCD.

Disclaimer: This Page is under Process, will be updating this page soon with the Lab Experiments.

Thank you all

Yours:

Pradeep Kumar

UNIT III: Assembly Language programming, Interrupts, Timing diagram: Questions and Notes

UNIT III: Assembly Language programming : Assembly Language programming with C/C++, Interrupt and Timing diagrams: Using Assembly Language with C/C++ for linking C/C++ into assembly language, Basic Programs – Use of BIOS and DOS Interrupts in assembly & C/C++, Interrupts of 8086 microprocessors, Timing diagram of 8086 microprocessor.

Syllabus Source:  

https://csvtu.ac.in/ew/download/b-tech-5th-semester-5/?wpdmdl=14364&refresh=63c24614a8a6f1673676308

👉Prerequisite: Study Following in detail before Attempting the Questions of this Unit.

1. INTERRUPTS?                            

2. ISR, IRET.                            

3. IVT .                         

4. TYPES OF INTERRUPTS. 

5. BLOCK DIAGRAMS OF TWO MODES of 8086 [ALSO SEE MN/MX(bar) pin diagrams].

6. Timing Diagram of Read and Write operation 8086 in Both Modes.

😃QUESTIONS : COMPILED FROM PREVIOUS YEAR CSVTU QP. :

Q. Draw Interrupt vector table of 8086 microprocessor and explain its various kinds of interrupts.

Interrupts in 8086:

While the CPU is executing a program, an interrupt breaks the normal execution of instructions, diverts its execution to some other program called Interrupt Service Routine (ISR).

Whenever an interrupt occurs the processor completes the execution of the current instruction and starts the execution of an Interrupt Service Routine (ISR) or Interrupt Handler. 

ISR is a program that tells the processor what to do when the interrupt occurs. At the end of the ISR the last instruction should be IRET. After the execution of ISR, control returns back to the main routine where it was interrupted.   

Q. Draw and Explain the Interrupt Vector Table. 

Q. Draw and Explain the Timing Diagram of Read and Write operation of Maximum Mode of 8086 Microprocessor.

Q. Draw the Timing diagram of the read and write cycle in minimum mode.

Q. Describe function of Maximum Mode pins/signals of 8086 Microprocessor. 

Q. Describe function of Minimum Mode pins/signals of 8086 Microprocessor. 

Q. Give the Maximum Mode of Operation of 8086 Microprocessor .

Q. Give the Minimum Mode of Operation of 8086 Microprocessor.

Ans: 

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~Pradeep Kumar

 

UNIT II: Microprocessor Architecture 8086- Questions and Notes

UNIT II: Microprocessor Architecture 8086: 8086 basic block diagram, Internal Microprocessor Architecture, Real Mode Memory Addressing, Registers, pin configuration, segmentation. Data Movement Instructions: MOV, PUSH/POP, Load-Effective Address, String Data Transfers, Miscellaneous Data Transfer Instructions, Segment Override Prefix, Assembler Details. Arithmetic and Logic Instructions: Addition, Subtraction and Comparison, Multiplication and Division, BCD and ASCII Arithmetic, Basic Logic Instructions, Shift and Rotate, String Comparisons. Program Control Instructions: The Jump Group, Controlling the Flow of the Program, Procedures, and Introduction to Interrupts, Machine Control and Miscellaneous Instructions. Assembler directives, assembler instructions, Assembly Language Programming.

Syllabus Source:

https://csvtu.ac.in/ew/download/b-tech-5th-semester-5/?wpdmdl=14364&refresh=63c24614a8a6f1673676308

👉Prerequisite: Study these Topics to answer the Questions

1. 8086 Basic Block diagram.

2. 8086 Pin configuration.

3. Memory Addressing

4. 8086 Instructions: for Instructions click on this 👉Notes8086Instruction

Hint: Types of Instructions in 8086

1. Data Copy/Transfer instructions
2. Arithmetic instructions.
3. Logical instructions.
4. Shift & Rotate instructions.
5. Branch instructions.
6. Loop instructions.
7. Machine Control instructions.
8. Flag Manipulation instructions.
9. String instructions.

Questions: Compiled from Previous Year Question Paper: 

Q1. Explain BIU & EU of 8086 microprocessor.

Ans: 

BIU (Bus Interface Unit) 

BIU takes care of all data and addresses transfers on the buses for the EU like sending addresses, fetching instructions from the memory, reading data from the ports and the memory as well as writing data to the ports and the memory.

It has the following functional parts − 

Instruction queue − BIU contains the instruction queue. BIU gets upto 6 bytes of next instructions and stores them in the instruction queue.

Fetching the next instruction while the current instruction executes is called pipelining. 

Segment register − BIU has 4 segment buses, i.e. CS, DS, SS& ES. It holds the addresses of instructions and data in memory, which are used by the processor to access memory locations. It also contains 1 pointer register IP, which holds the address of the next instruction to executed by the EU. 

o CS − It stands for Code Segment. It is used for addressing a memory location in the code segment of the memory, where the executable program is stored. 

o DS − It stands for Data Segment. It consists of data used by the program andis accessed in the data segment by an offset address or the content of other register that holds the offset address. 

o SS − It stands for Stack Segment. It handles memory to store data and addresses during execution. 

o ES − It stands for Extra Segment. ES is additional data segment, which is used by the string to hold the extra destination data. 

 Instruction pointer − It is a 16-bit register used to hold the address of the next instruction to be executed.

EU (Execution Unit) :

Execution unit gives instructions to BIU stating from where to fetch the data and then decode and execute those instructions. Its function is to control operations on data using the instruction decoder & ALU. EU has no direct connection with system buses as shown in the above figure, it performs operations over data through BIU. 

Let us now discuss the functional parts of 8086 microprocessors. 

ALU:  It handles all arithmetic and logical operations, like +, −, ×, /, OR, AND, NOT operations. 

Flag Register: It is a 16-bit register that behaves like a flip-flop, i.e. it changes its status according to the result stored in the accumulator. It has 9 flags and they are divided into 2 groups − Conditional Flags and Control Flags. Conditional Flags It represents the result of the last arithmetic or logical instruction executed. Following is the list of conditional flags − 

 Carry flag − This flag indicates an overflow condition for arithmetic operations. 

 Auxiliary flag − When an operation is performed at ALU, it results in a carry/barrow from lower nibble (i.e. D0 – D3) to upper nibble (i.e. D4 – D7), then this flag is set, i.e. carry given by D3 bit to D4 is AF flag. The processor uses this flag to perform binary to BCD conversion. 

 Parity flag − This flag is used to indicate the parity of the result, i.e. when the lower order 8-bits of the result contains even number of 1’s, then the Parity Flag is set. For odd number of 1’s, the Parity Flag is reset. 

 Zero flag − This flag is set to 1 when the result of arithmetic or logical operation is zero else it is set to 0. 

 Sign flag − This flag holds the sign of the result, i.e. when the result of the operation is negative, then the sign flag is set to 1 else set to 0. 

 Overflow flag − This flag represents the result when the system capacity is exceeded. Control Flags Control flags controls the operations of the execution unit. Following is the list of control flags − 

 Trap flag − It is used for single step control and allows the user to execute one instruction at a time for debugging. If it is set, then the program can be run in a single step mode. 

 Interrupt flag − It is an interrupt enable/disable flag, i.e. used to allow/prohibit the interruption of a program. It is set to 1 for interrupt enabled condition and set to 0 for interrupt disabled condition. 

 Direction flag − It is used in string operation. As the name suggests when it is set then string bytes are accessed from the higher memory address to the lower memory address and vice-a-versa. 

General purpose register:

 There are 8 general purpose registers, i.e., AH, AL, BH, BL, CH, CL, DH, and DL. These registers can be used individually to store 8-bit data and can be used in pairs to store 16bit data. The valid register pairs are AH and AL, BH and BL, CH and CL, and DH and DL. It is referred to the AX, BX, CX, and DX respectively.  

 AX register − It is also known as accumulator register. It is used to store operands for arithmetic operations. 

 BX register − It is used as a base register. It is used to store the starting base address of the memory area within the data segment. 

 CX register − It is referred to as counter. It is used in loop instruction to store the loop counter. 

 DX register − This register is used to hold I/O port address for I/O instruction.  

Q2. Explain the various addressing modes of 8086 with suitable example.

Ans : click👉 Addressing modes of 8086

Types of addressing mode in 8086

1. Immediate addressing mode: MOV AX,10ABH
2. Direct addressing mode: MOV AX, [5000H]
3. Register addressing mode: MOV AX,BX
4. Register Indirect addressing mode: MOV AX,[BX]
5. Indexed addressing mode: MOV AX,[SI]
6. Register relative addressing mode: MOV AX, 50H[BX]
7. Base plus index addressing mode: MOV AX, [BX] [SI]
8. Base relative plus index addressing mode: MOV AX,50H[BX][SI]

Q3. Explain the following instructions:

(i) XCHG

(ii) CLD

(iii) AAA

(iv)CMPS

Answer: Click on this 👉📝Q3#Notes

Q4. WAP to find the smallest number among a string of 10 data bytes starting from location 2000H: 3000H and store the result in 2000H: 0500H.

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~Pradeep Kumar